Supermicro HMT325S6BFR8C-H9 Spezifikationen PDF herunterladen

Seite 1 - Based on 2Gb B-die

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 1204pin DDR3 SDRAM SODIMM*Hynix Semiconductor reserves th

Seite 2 - Revision History

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 10 2GB, 256Mx64 Module(2Rank of x16)DQS1DQS1DM1DQ [8:15]D

Seite 3 - Ordering Information

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 11 2GB, 256Mx64 Module(1Rank of x8)DQS0DQS0DM0DQ[0:7]DQSD

Seite 4 - Address Table

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 12 4GB, 512Mx64 Module(2Rank of x8) DQS3DQS3DM3DQ[24:31]D

Seite 5 - Pin Descriptions

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 13 Absolute Maximum RatingsAbsolute Maximum DC RatingsNot

Seite 6 - Symbol Type Polarity Function

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 14 AC & DC Operating ConditionsRecommended DC Operati

Seite 7

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 15 AC and DC Input Levels for Single-Ended SignalsDDR3 SD

Seite 8 - Pin Assignments

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 16 Vref TolerancesThe dc-tolerance limits and ac-noise li

Seite 9 - Functional Block Diagram

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 17 AC and DC Logic Input Levels for Differential SignalsD

Seite 10

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 18 Differential swing requirements for clock (CK - CK) an

Seite 11 - Sensor or may be

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 19 Single-ended requirements for differential signalsEach

Seite 12 - Cterm Cterm

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 2 Revision HistoryRevision No. History Draft Date Remark0

Seite 13 - Absolute Maximum Ratings

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 20 Notes:1. For CK, CK use VIH/VIL (ac) of ADD/CMD; for s

Seite 14 - RefCA(DC)

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 21 Notes:1. Extended range for VIX is only allowed for cl

Seite 15 - RefDQ(DC)

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 22 Slew Rate Definitions for Differential Input SignalsIn

Seite 16 - Vref Tolerances

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 23 AC & DC Output Measurement LevelsSingle Ended AC a

Seite 17

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 24 Single Ended Output Slew RateWhen the Reference load f

Seite 18 - Rev. 0.4 / Jul. 2010 18

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 25 Differential Output Slew RateWith the reference load f

Seite 19 - Rev. 0.4 / Jul. 2010 19

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 26 Reference Load for AC Timing and Output Slew RateFigur

Seite 20 - Rev. 0.4 / Jul. 2010 20

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 27 Overshoot and Undershoot SpecificationsAddress and Con

Seite 21 - Rev. 0.4 / Jul. 2010 21

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 28 Clock, Data, Strobe and Mask Overshoot and Undershoot

Seite 22 - Measured

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 29 Refresh parameters by device densityRefresh parameters

Seite 23

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 3 DescriptionHynix Unbuffered Small Outline DDR3 SDRAM DI

Seite 24 - Rev. 0.4 / Jul. 2010 24

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 30 Standard Speed BinsDDR3 SDRAM Standard Speed Bins incl

Seite 25 - Differential Output Slew Rate

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 31 DDR3-1066 Speed BinsFor specific Notes See “Speed Bin

Seite 26 - Rev. 0.4 / Jul. 2010 26

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 32 DDR3-1333 Speed BinsFor specific Notes See “Speed Bin

Seite 27 - Rev. 0.4 / Jul. 2010 27

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 33 DDR3-1600 Speed BinsFor specific Notes See “Speed Bin

Seite 28 - (CK, CK, DQ, DQS, DQS, DM)

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 34 Speed Bin Table NotesAbsolute Specification (TOPER; VD

Seite 29 - Rev. 0.4 / Jul. 2010 29

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 35 Environmental ParametersNote: 1. Stress greater than t

Seite 30 - Standard Speed Bins

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 36 Pin Capacitance (VDD=1.5V, VDDQ=1.5V)1GB: HMT312S6BFR6

Seite 31 - Rev. 0.4 / Jul. 2010 31

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 37 IDD and IDDQ Specification Parameters and Test Conditi

Seite 32 - Rev. 0.4 / Jul. 2010 32

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 38 Figure 1 - Measurement Setup and Test Load for IDD and

Seite 33 - Rev. 0.4 / Jul. 2010 33

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 39 Table 1 -Timings used for IDD and IDDQ Measurement-Loo

Seite 34 - Speed Bin Table Notes

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 4 Key ParametersSpeed GradeAddress TableMT/s GradetCK(ns)

Seite 35 - Environmental Parameters

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 40 IDD2NPrecharge Standby CurrentCKE: High; External cloc

Seite 36 - 4GB: HMT351S6BFR8C

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 41 IDD4ROperating Burst Read CurrentCKE: High; External c

Seite 37 - IHAC(max)

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 42 a) Burst Length: BL8 fixed by MRS: set MR0 A[1,0]=00Bb

Seite 38 - Rev. 0.4 / Jul. 2010 38

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 43 Table 3 - IDD0 Measurement-Loop Patterna)a) DM must be

Seite 39 - Rev. 0.4 / Jul. 2010 39

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 44 Table 4 - IDD1 Measurement-Loop Patterna)a) DM must be

Seite 40 - Rev. 0.4 / Jul. 2010 40

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 45 Table 5 - IDD2N and IDD3N Measurement-Loop Patterna)a)

Seite 41 - Rev. 0.4 / Jul. 2010 41

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 46 Table 7 - IDD4R and IDDQ4R Measurement-Loop Patterna)a

Seite 42 - Rev. 0.4 / Jul. 2010 42

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 47 Table 9 - IDD5B Measurement-Loop Patterna)a) DM must b

Seite 43 - Rev. 0.4 / Jul. 2010 43

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 48 Table 10 - IDD7 Measurement-Loop Patterna)ATTENTION! S

Seite 44 - Rev. 0.4 / Jul. 2010 44

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 49 IDD Specifications (Tcase: 0 to 95oC)* Module IDD valu

Seite 45 - Rev. 0.4 / Jul. 2010 45

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 5 Pin DescriptionsPin Name DescriptionNumberPin Name Desc

Seite 46 - Rev. 0.4 / Jul. 2010 46

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 50 2GB, 256M x 64 SO-DIMM: HMT325S6BFR8C4GB, 512M x 64 SO

Seite 47 - Rev. 0.4 / Jul. 2010 47

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 51 Module Dimensions128Mx64 - HMT312S6BFR6CFrontBackSPD30

Seite 48

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 52 256Mx64 - HMT325S6BFR6CFrontBackSPD30.0mm 67.60mm20.0m

Seite 49 - Rev. 0.4 / Jul. 2010 49

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 53 256Mx64 - HMT325S6BFR8CFrontBackSPD30.0mm 67.60mm20.0m

Seite 50 - Rev. 0.4 / Jul. 2010 50

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 54 512Mx64 - HMT351S6BFR8CFrontBack30.0mm 67.60mm20.0mm 6

Seite 51 - Module Dimensions

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 6 Input/Output Functional DescriptionsSymbol Type Polarit

Seite 52 - Detail-A

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 7 SDA I/O —This bidirectional pin is used to transfer dat

Seite 53 - Rev. 0.4 / Jul. 2010 53

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 8 Pin AssignmentsPin #Front SidePin #Back SidePin #Front

Seite 54 - Detail-B

APCPCWM_4828539:WP_0000005WP_0000005APCPCWM_4828539:WP_0000005WP_0000005Rev. 0.4 / Jul. 2010 9 Functional Block Diagram1GB, 128Mx64 Module(1Rank of x1

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